The present invention relates to a liquid crystal display device, a wiring substrate, and methods for fabricating the liquid crystal display device and the wiring substrate. More particularly, the present invention relates to a liquid crystal display device capable of realizing reflection-mode display by use of ambient light, and a method for fabricating such a liquid crystal display device.
In recent years, rapid progress has been made in the field of application of liquid crystal display (LCD) devices to wordprocessors, laptop computers, pocket TV sets, and the like. Among the LCD devices, a reflection type LCD device capable of realizing display by reflecting ambient light, in particular, has attracted attention for its possibility of reducing the power consumption, the thickness, and the weight taking advantage of requiring no backlight. Nowadays, also, there has been developed a dual-mode LCD device that can realize display in both reflection and transmission modes.
Conventionally, in LCD devices, a reflector or a reflection layer for reflecting ambient light was placed on the outer surface of a substrate (a TFT substrate or a substrate located farther from the viewer). However, as the pixel size becomes smaller with increase in the capacity of the LCD devices, this construction arises the following problem. That is, parallax is generated due to the difference in distance from a color filter (pixel portion) and the reflector (reflection layer), and this deteriorates display quality.
In order to solve the above problem, the construction of placing a reflection layer on the surface of a substrate facing a liquid crystal layer has become widely used. In this construction, also, the reflection layer itself is used as an electrode for applying a voltage to the liquid crystal layer (for example, as a pixel electrode in an LCD device using TFTs). As the material for the reflection layer, aluminum (Al) (and an Al alloy) is often used since Al is high in reflectance, easily patterned, and low in electric resistance.
It is known that when an ITO layer and an Al layer are put in contact with each other and together exposed to an alkaline solution, galvanic corrosion occurs between ITO and Al, resulting in partial loss of the ITO layer and the Al layer. Note that in the following description, the expression xe2x80x9cITO layerxe2x80x9d includes not only the ITO layer before patterning but also a pattern of ITO layer after the patterning, unless otherwise specified.
Japanese Laid-Open Patent Publication No. 3-246524 discloses a solution for the problem of partial loss. That is, conventionally, a double-layer structure of Al layer/ITO layer is adopted for display electrodes or interconnections, in place of the original single ITO layer, to reduce the electric resistance of the display electrodes or interconnections. With this double-layer structure, however, part of the ITO layer tends to be lost in a process of developing a resist layer formed on the Al layer with an alkaline solution. The publication discloses providing a protection layer made of molybdenum (Mo) or a Mo alloy (Moxe2x80x94Ti, for example) between the ITO layer and the Al layer. By providing this protection layer, even if a pinhole exists in the Al layer, the above problem of partial loss of the ITO layer can be solved.
However, the inventors of the present invention have found that the method disclosed in Japanese Laid-Open Patent Publication No. 3-246524 described above has a problem as follows. Galvanic corrosion between ITO and Al is prevented by the formation of a Mo layer (including a Mo alloy layer) between the ITO layer and the Al layer. However, if a pinhole exists in the Al layer, the Al layer is corroded at a portion surrounding the pinhole when the Al layer is exposed to an alkaline developer, remover, or etchant, resulting in partial loss of the Al layer. Note that the method disclosed in the above publication is not directed to suppression/prevention of formation of a pinhole in the Al layer, but directed to prevention of galvanic corrosion between ITO and Al, and for this purpose, a Mo layer (or a Mo alloy layer) that can be etched together with the Al layer is formed as an intermediate layer blocking direct contact between the Al layer and the ITO layer.
If an Al layer is partially lost in a construction using the Al layer as part of a reflection electrode, the area of the resultant reflection electrode (reflection layer) decreases, resulting in deterioration of the function of reflecting ambient light. To state more specifically, in a method for fabricating a liquid crystal display device including an Al layer as a reflection layer, the Al layer is subjected to a process of developing a resist layer with an alkaline developer for formation of a resist pattern that is used as a mask in patterning of the Al layer, and a process of removing the resist pattern with an alkaline remover after the patterning of the Al layer. When the Al layer has a pinhole and is exposed to such an alkaline developer or remover in the above processes, a portion of the Al layer surrounding the pinhole (typically, a circle having a diameter of 2 to 5 xcexcm) is lost. This partial loss of the Al layer (growth of the pinhole) is more eminent in the removing process than in the developing process. This is because a remover has higher ability of decomposing the resist layer than a developer, and also the surface area of the Al layer exposed to the remover is larger than that exposed to the developer.
In the patterning of the Al layer, the phenomenon of partial loss of the Al layer also causes the problem that peripheries of the patterned Al layer are jagged (like edges of a stamp). The patterning of the Al layer may be performed with a variety of materials (alkaline and acid solutions, and the like) by a variety of methods. When etching is adopted, occurrence of partial loss of the Al layer is more eminent in wet etching, which can advantageously etch the layered structure of Al layer/Mo layer with a same etchant, than in dry etching.
When an Al layer is temporarily deposited on an ITO layer as the top layer of a terminal electrode and then removed, part of the ITO layer may disadvantageously be lost due to galvanic corrosion between ITO and Al. For example, there is a case where an ITO layer is formed as the top layer of a terminal electrode such as a scanning line terminal electrode in a terminal area and the Al layer for formation of the reflection layer is temporarily deposited on the ITO layer. When the temporarily deposited Al layer is removed with an etchant, the ITO layer may be partially lost due to galvanic corrosion, and as a result the reliability of the terminal electrode may be impaired.
The problem of partial loss of an Al layer is disadvantageous, not only in the LCD device using the Al layer as the reflection layer, but also in LCD devices or other devices including interconnections, electrodes, or the like having the double-layer structure of Al layer/ITO layer, such as a display device using organic electroluminescence (EL) and a solar battery. For example, in an active matrix LCD device using TFTs that includes signal lines having the double-layer structure of Al layer/ITO layer, if the extent of partial loss of the Al layer is great, the Al layer may be narrowed excessively or may be broken. As a result, the Al layer may fail to sufficiently supplement the conductance of the ITO layer. If the conductance of a signal line decreases, normal display may not be obtained due to signal delay or the like. Note that in the following description the term xe2x80x9cbreakxe2x80x9d sometimes refers to the state where the conductance of an interconnection such as a signal line is reduced to such a degree that normal display is no more possible, in addition to the state where an interconnection is completely broken.
Objects of the present invention are providing a liquid crystal display device and a wiring substrate, which can suppress/prevent occurrence of partial loss of an Al layer formed on a Mo layer due to a pinhole in the Al layer, and methods for fabricating the liquid crystal display device and the wiring substrate.
The liquid crystal display device of the present invention includes a pair of substrates, a liquid crystal layer interposed between the pair of substrates, and a plurality of electrode pairs each facing each other via the liquid crystal layer, one of each pair of the plurality of electrode pairs being a reflection electrode for realizing display in a reflection mode, wherein the reflection electrode includes a first metal layer containing Mo (also called a Mo layer) and a second metal layer containing Al (also called an Al layer) formed on the first metal layer, and the first metal layer is a crystal layer having a maximum grain size of crystal grains at a surface of 60 nm or less or an amorphous layer.
The first metal layer is preferably composed of Mo.
Part of the reflection electrode may be formed on a transparent conductive layer made of ITO.
The method for fabricating a liquid crystal display device of the present invention is a method for fabricating a liquid crystal display device including a pair of substrates, a liquid crystal layer interposed between the pair of substrates, and a plurality of electrode pairs each facing each other via the liquid crystal layer, one of each pair of the plurality of electrode pairs being a reflection electrode for realizing display in a reflection mode. The reflection electrode is formed by a method including the steps of: forming a first metal layer containing Mo on one of the substrates, the first metal layer being a crystal layer having a maximum grain size of crystal grains at a surface of 60 nm or less or an amorphous layer; forming a second metal layer containing Al on the first metal layer; and patterning the first and second metal layers.
In the above method, the first metal layer is preferably composed of Mo.
The step of forming a first metal layer may include forming an amorphous first metal layer in an atmosphere containing nitrogen.
The method may further include the step of forming a transparent conductive layer made of ITO on the substrate before the step of forming a first metal layer, and at least part of the first metal layer may be formed on the transparent conductive layer.
The density of pinholes formed in the second metal layer is preferably 20 pcs./10000 xcexcm2 or less.
The step of patterning the first and second metal layers may include the steps of: forming a resist layer on the first and second metal layers; exposing the resist layer to light; forming a resist pattern having a predetermined pattern by developing the exposed resist layer with an alkaline developer; patterning the first and second metal layers using the resist pattern as a mask; and removing the resist pattern with an alkaline remover.
The step of patterning the first and second metal layers may include the step of etching at least one of the first and second metal layers.
The step of patterning the first and second metal layers preferably includes the step of wet-etching the first and second metal layers with a common etchant.
Alternatively, the method for fabricating a liquid crystal display device of the present invention is a method for fabricating a liquid crystal display device including a pair of substrates, a liquid crystal layer interposed between the pair of substrates, and a transparent conductive layer made of ITO formed on at least one of the pair of substrates. The method includes the steps of: forming the transparent conductive layer by a process of depositing an ITO layer on the at least one of the pair of substrates and patterning the ITO layer; forming a first metal layer containing Mo on the ITO layer or the transparent conductive layer, the first metal layer being a crystal layer having a maximum grain size of crystal grains at a surface of 60 nm or less or an amorphous layer; forming a second metal layer containing Al on the first metal layer; and patterning the first and second metal layers.
In the above alternative method, the transparent conductive layer may be formed as a top layer of a terminal electrode connected to an interconnection formed in a display area.
In the above alternative method, the liquid crystal display device may be a TFT active matrix liquid crystal display device, and at least one of a signal line, a source electrode, and a drain electrode may have a structure including the transparent conductive layer, the first metal layer, and the second layer layered sequentially.
In the above alternative method, the ITO layer may be patterned by forming a resist pattern on the ITO layer and wet-etching the ITO layer using the resist pattern as a mask, and the first and second metal layers may be patterned, separately from the patterning of the ITO layer, by forming a different resist pattern on the first and second metal layers and wet-etching the first and second metal layers using the different resist pattern as a mask.
The wiring substrate of the present invention includes interconnections or electrodes formed on a substrate, the interconnections or electrodes having a multilayer structure including a transparent conductive layer made of ITO. The interconnections or electrodes include a first metal layer containing Mo formed on the transparent conductive layer and a second metal layer containing Al formed on the first metal layer, and the first metal layer is a crystal layer having a maximum grain size of crystal grains at a surface of 60 nm or less or an amorphous layer.
The method for fabricating a wiring substrate of the present invention is a method for fabricating a wiring substrate including interconnections or electrodes formed on a substrate, the interconnections or electrodes having a multilayer structure including a transparent conductive layer made of ITO. The method includes the steps of: forming the transparent conductive layer by a process of depositing an ITO layer on the substrate and patterning the ITO layer; forming a first metal layer containing Mo on the ITO layer or the transparent conductive layer, the first metal layer being a crystal layer having a maximum grain size of crystal grains at a surface of 60 nm or less or an amorphous layer; forming a second metal layer containing Al on the first metal layer; and patterning the first and second metal layers.
In the above method for fabricating a wiring substrate, the ITO layer may be patterned by forming a resist pattern on the ITO layer and wet-etching the ITO layer using the resist pattern as a mask, and the first and second metal layers may be patterned, separately from the patterning of the ITO layer, by forming a different resist pattern on the first and second metal layers and wet-etching the first and second metal layers using the different resist pattern as a mask.
The present invention is based on the findings obtained as a result of an in-depth examination by the present inventors on the relationship between the surface structure (configuration) of a Mo layer and the number density of pinholes (also sometimes simply called the density of pinholes) generated in an Al layer deposited on the Mo layer.
When a Mo layer is deposited by sputtering, columnar crystal (typically, a polycrystal) of Mo is normally grown. When an Al layer is deposited on the Mo layer, pinholes are mostly generated in the grain boundary area at the surface of the Mo layer in the form of columnar crystal. If the size of crystal grains at the surface of the Mo layer is 60 nm or less, the density of pinholes generated in the Al layer is reduced to 20 pcs./10000 xcexcm2 or less. Further, if the size of crystal grains at the surface of the Mo layer is 30 nm or less, generation of pinholes is substantially prevented. The density of pinholes in the Al layer also depends on the thickness of the Al layer. In order to realize good reflection characteristics, the thickness of the Al layer is preferably 50 nm or more. The relationship between the size of crystal grains of the Mo layer and the density of pinholes in the Al layer described above is only established when the Al layer has a thickness of at least 50 nm.
The xe2x80x9ccrystal layerxe2x80x9d as used herein collectively represents a layer including crystal grains, and includes not only a polycrystalline layer composed of a plurality of crystal grains but also a layer in which a plurality of crystal grains (islands) are scattered in an amorphous phase (sea) (sea-island structure). The xe2x80x9cgrain boundaryxe2x80x9d as used herein includes not only the boundary between crystal grains in a polycrystalline layer but also the boundary between an amorphous phase (sea) and crystal grains (island). The xe2x80x9csize of crystal grains at the surface of the Mo layerxe2x80x9d as used herein refers to the longitudinal length of crystal grains (typically, columnar crystal grains) in the two-dimensional plane obtained by observation of the surface configuration of the Mo layer, unless otherwise specified. The observation of the surface configuration is made with an optical microscope or an electron microscope, for example. The xe2x80x9csize of crystal grains at the surface of the Mo layerxe2x80x9d is sometimes simply called the xe2x80x9csurface grain sizexe2x80x9d or the xe2x80x9cgrain sizexe2x80x9d.
The grain size of the Mo layer may be controlled by adjusting the film formation conditions (typically, the sputtering conditions such as the gas pressure, the electric power supplied, and the film thickness) for the Mo layer. For example, the grain size of the Mo layer is reduced by increasing the electric power supplied during sputtering. If the electric power supplied is so high that the grain size of the deposited Mo layer is as small as less than about 4 nm, control of the film thickness may become difficult. In addition, splash may be generated in the Mo layer. If splash is generated, the Mo layer fails to sufficiently function as the protection layer. When the grain size of the Mo layer is in the range of 4 nm to 60 nm, the Mo layer can advantageously be deposited by sputtering to a thickness as designed without generation of splash.
In place of forming the crystal Mo layer having a small surface grain size, an amorphous Mo layer may be formed. No grain boundary exists at the surface of the amorphous Mo layer. Therefore, no pinhole is substantially generated in the Al layer deposited on the amorphous Mo layer. Such an amorphous Mo layer can be formed by depositing Mo in an atmosphere containing nitrogen gas, for example. To be strict, therefore, the amorphous Mo layer obtained by this method contains a trace amount of nitrogen.
As the nitrogen content of the amorphous Mo layer is higher, the electric resistance of the Mo layer is lower. Accordingly, the nitrogen content of the Mo layer may be appropriately adjusted in accordance with the structure and performance of the liquid crystal display device to be fabricated. If the nitrogen content is low, Mo columnar crystal will grow. In this case, however, the grain size of 60 nm or less can be obtained by adjusting the concentration of nitrogen gas in the atmosphere for film formation together with other film formation conditions.
The thickness of the Mo layer is preferably about 40 nm or more to sufficiently function as the protection layer. The Mo layer may be of a layered structure composed of a crystal layer including crystal grains having a size larger than 60 nm as the bottom layer and a crystal Mo layer having a grain size of 60 nm or less or an amorphous Mo layer as the top layer. As a matter of course, the layered structure may be composed of a crystal Mo layer having a grain size of 60 nm or less and an amorphous Mo layer.
In the method for fabricating a liquid crystal display device of the present invention, since the density of pinholes is low (or substantially no pinhole exists) in the Al layer formed on the Mo layer, it is possible to suppress/prevent occurrence of partial loss of the Al layer at portions surrounding pinholes in the process of patterning the Al layer by wet etching and in the process of removing a mask for etching used in the patterning of the Al layer with an alkaline remover. Further, in a construction where an ITO layer underlies the Mo layer, the Mo layer blocks galvanic corrosion between ITO and Al caused by an etchant or an alkaline developer or remover. This prevents occurrence of partial loss of the Al layer and the ITO layer.